256 x 256 DIGITAL SWITCHING MATRIX Integrated Circuit Chip M3488B1

256 x 256 DIGITAL SWITCHING MATRIX M3488B1

• . 256 INPUT AND 256 OUTPUT CHANNEL CMOS DIGITAL SWITCHING MATRIX COMPATIBLE WITH M088
• . BUILDING BLOCK DESIGNED FOR LARGE CAPACITY ELECTRONIC EXCHANGES, SUBSYSTEMS AND PABX
• . NO EXTRA PIN NEEDED FOR NOT-BLOCKING SINGLE STAGE AND HIGHER CAPACITY SYNTHESIS BLOCKS (512 or 1024 channels)
• . EUROPEAN TELEPHONE STANDARD COMPATIBLE (32 serial channels per frame)
• . PCM INPUTS AND OUTPUTS MUTUALLY COMPATIBLE
• . ACTUAL INPUT-OUTPUT CHANNEL CONNECTIONS STORED AND MODIFIED VIA AN ON CHIP 8-BIT PARALLEL MICROPROCESSOR INTERFACE
• . TYPICAL BIT RATE : 2Mbit/s
• . TYPICAL SYNCHRONIZATION RATE : 8KHz (time frame is 125µs)
• . 5V P0WER SUPPLY
• . CMOS & TTL INPUT/OUTPUT LEVELS COMPATIBLE
• . HIGH DENSITY ADVANCED 1.2µm HCMOS3 PROCESS

Main instructions controlled by the microprocessor interface

• . CHANNEL CONNECTION/DISCONNECTION
• . OUTPUT CHANNEL DISCONNECTION .INSERTION OF A BYTE ON A PCM OUTPUT CHANNEL/DISCONNECTION
• . TRANSFER TO THE MICROPROCESSOR OF A SINGLE PCM OUTPUT CHANNEL SAMPLE
• . TRANSFER TO THE MICROPROCESSOR OF A SINGLE OUTPUT CHANNEL CONTROL WORD
• . TRANSFER TO THE MICROPROCESSOR OF A SELECTED 0 CHANNEL PCM INPUT DATA

ABSOLUTE MAXIMUM RATINGS

Stresses above those listed under ” Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operating conditions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

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256 x 256 DIGITAL SWITCHING MATRIX Integrated Circuit Chip M3488B1 Images